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Semiconductors touch our lives at every level, and in the years to come, their impact will increase manifold. An immediate influencing factor is the boom in the electronics market that is pushing the demand for next-generation chip designing and manufacturing. The Indian semiconductor industry today represents every aspect of the semiconductor lifecycle, from cutting-edge EDA and VLSI design companies to an evolving manufacturing eco-system. A leading player in the arena is Cadence Design Systems. In 2007, it opened its third research and development facility in Noida, the largest Cadence R&D site outside the US. Jaswinder S Ahuja, corporate vice-president and the managing director of Cadence Design Systems (India) feels that traditionally, the Indian market has been strong in verification—the process of ensuring that the design of a semiconductor meets its specifications. Under his leadership, the engineering centre in India has grown significantly and established itself in various design automation technology areas. In an interaction with BV Mahalakshmi, Ahuja reckons that a key factor which positions India as a favoured destination for semiconductor and embedded design is growing economy, engineering talent and a domestic market coupled with accessibility to other Asian markets. Excerpts:Design verification is gaining a lot of traction. How do you look at it as a revenue opportunity?Design verification is the process of ensuring that the design of a semiconductor meets its specifications. That is, it does the chip work the way it was designed to work, under all possible conditions and stresses. Chip design verification has multiple aspects such as functional verification, timing verification, layout (physical) verification and electrical verification.To ensure correct system functionality, design and verification teams simulate, debug, verify and analyse system hardware and software in-parallel under all expected and unexpected conditions prior to manufacturing. With the increasing demand for convergence and functionality in chips, verification is one of the most critical functions in ensuring that semiconductor companies hit their time-to-market windows. Thorough verification reduces the need for re-spins, which are costly in terms of time, resources and dollars. That is why up to 50% of the project teams can consist of verification engineers. Statistical data shows that around 70% of the project development cycle is devoted to design verification— a testament to how important verification is in the design cycle.How do electronic design automation tools help techies in chip design and development?Electronic design automation (EDA) solutions are critical to today's design teams. EDA tools ensure predictability in design and provide a reliable verification methodology, so that customers can optimise the chip development cycle time despite design complexities, thereby ensuring that they are able to get the chips to the market in time and on budget. With the increasing complexity of chips and the increasing importance of verification, it is tipped to be one of the growth engines for the EDA space.We have an incisive verification platform that provides a comprehensive solution to our customer's verification problems—including flows, products and services. The breadth of the technology enables customers to achieve a predictable path to verification closure by reducing risk and ensuring front-end closure with automated planning and management, IP creation and reuse, test-bench simulation, performance acceleration and low power methodologies.What are the key challenges faced by semiconductor design teams?For semiconductor design companies, the productivity of design teams is a key business imperative as they have to deliver value while keeping operating costs in check. Time to market pressures and short product lifecycles also imply that the product has to be out in the market within a very tight window in order for it to be cost-effective and profitable.As a result, chip designers need the entire design process to be more predictable and thereby more efficient to avoid costly re-spins. One way by which companies can reduce cost is by using commercial intellectual property and/or re-using in-house intellectual property from other design projects. For example, for standard interfaces or for standard non-critical functions, reuse or purchase of intellectual property is a good option.In terms of in-house reuse, the challenge is in maintaining the intellectual property. For example, if the intellectual property is for a 45nm design and the new design is 32nm, then it is imperative that the intellectual property should be tested and verified at the new process node to make sure that the functionality is not affected. Another example is updating the intellectual property with feedback received from the market once the chip is taped out and in use. Many of the large semiconductor companies have maintenance teams to ensure that in-house intellectual property is up-to-date and ready for reuse.As integration is a critical factor in using intellectual property, Cadence's Verification IP (VIP) Integration Service allows the customer to quickly utilise Cadence Incisive Universal Verification Components (UVCs) to maximise chip and system-level verification productivity. By leveraging verification intellectual property in the form of UVCs jumpstarts the verification process, thereby helping the customer achieve metrics and coverage in days.How do you perceive the Indian market for semiconductor design verification?Over the last 23 years, we have invested extensively in both—facilities and employees in India. The company currently employs approximately 900 people engaged in research and development, IT support, global customer care and support functions at centres in Noida and Bangalore.Cadence's R&D centres in Bangalore and Noida work on all of the company's platforms, including the Incisive Verification platform. The team has contributed to a range of products in the Incisive platform. To take a recent example, a large part of the Incisive Enterprise Verifier, launched in October 2009, was driven out of India. Cadence's verification solution is multi-specialist and multi-domain in nature, comprehending both hardware and software and enabling an integrated view of verification closure. Key tenets include the multi-language open verification methodology (OVM), which helps with verification scalability and reuse and a broad verification IP portfolio that through reuse helps reduce time to market and verification costs.We offer comprehensive support for standards-based solutions, thus enabling designers to get access to full verification capabilities for System C and mixed-HDL designs across both hardware and software simulation environments. Low power of chips is now the top consideration of designers and Cadence provides some pioneering solutions for low power verification. Cadence also provides some industry leading solutions for mixed signal design verification, which is generally considered to be the most complex process.Customers are looking for their entire design method to be more predictable. How do you deal with it?Predictability of the entire design is more important than purchasing the one 'best' technology in any domain. Technology is a tool that helps designers to improve predictability. With today's complex designs, an incomplete toolset will certainly be a hindrance, but equally one strong tool alone is not the silver bullet that will maximise the designer's productivity or the design's predictability. The design teams will choose the tools, solutions and methodologies that will increase predictability and productivity to ensure first silicon success. This is what will lead to the ultimate goal—profitability.In terms of low power and performance issues, this is largely driven by consumer demand for smaller, faster and more complex electronic gadgets. Semiconductor companies have to take these factors into consideration when designing, because this is what their customers demand. The issue they face is how to include all the performance and functionality that their customers want while still realising a profit.
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